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19-5022; Rev 0; 10/09
TION KIT EVALUA BLE ILA AVA
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection
Features
S Low 5I (typ) On-Resistance (R_, G_, B_ Signals) S Low 5.5pF (typ) On-Capacitance (R_, G_, B_
General Description
The MAX4885AE integrates high-bandwidth analog switches, level-translating buffers, and level-translating FET switches to implement a complete 2:1 multiplexer for VGA signals. The device provides three very highfrequency 900MHz (typ) SPDT switches for RGB signals, two low-frequency clamping switches for the DDC signals, a pair of level-translating buffers for the H_ and V_ signals, and integrated extended ESD protection. Horizontal and vertical synchronization (H_/V_) inputs feature level-shifting buffers to support low-voltage controllers and standard 5V-TTL-compatible monitors, meeting the VESA requirement. Display Data Channel (DDC), consisting of SDA_ and SCL_, are FET switches that protect the low-voltage VGA source from potential damage from high-voltage presence on the monitor while reducing capacitive load. All seven output terminals of the MAX4885AE feature high-ESD protection to Q15kV Human Body Model (HBM) (see the Pin Description). All other pins are protected to Q2kV Human Body Model (HBM). The MAX4885AE is specified over the extended -40NC to +85NC temperature range, and is available in a spacesaving, 28-pin, 4mm x 4mm TQFN package. Signals)
MAX4885AE
S Independent, Selectable Logic Inputs for
Switching
S Similar Pin Configuration to MAX4885 S Ultra-Small, 28-Pin (4mm x 4mm) TQFN Package S Q15kV ESD HBM
Ordering Information
PART MAX4885AEETI+ TEMP RANGE -40NC to +85NC PIN-PACKAGE 28 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
Typical Operating Circuit
+3.3V 1F +5V 1F
VL MAX4885AE
3
VCC
Applications
Notebook Computer--MXM/Switchable Graphics KVM for Servers
MXM MODULE
2 2
R1, G1, B1 H1, V1 SDA1, SCL1
R0, G0, B0 H0, V0 SDA0, SCL0
3 2 2 VGA PORT
3 INTERNAL GRAPHICS 2 2
R2, G2, B2 H2, V2 SDA2, SCL2 SEL1 SEL2 GND
CPU
_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection MAX4885AE
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND unless otherwise noted.) VCC ..........................................................................-0.3V to +6V VL.............................................................. -0.3V to (VCC + 0.3V) R_, G_, B_, H0, V0, SDA0, SCL0 ............. -0.3V to (VCC + 0.3V) H1, H2, V1, V2, SDA1, SDA2, SCL1, SCL2, SEL1, SEL2 ................................... -0.3V to (VL + 0.3V) Continuous Current through R_, G_, B_ Switches .......... Q50mA Continuous Current through SDA_, SCL_ Switches ...... Q50mA Continuous Current into SEL1, SEL2, H1, H2, V1, V2 .... Q20mA Peak Current through all Switches (pulsed at 1ms, 10% duty cycle) ............................... Q100mA Continuous Power Dissipation (TA = +70NC) 28-Pin TQFN (derate 28.6mW/NC above +70NC) ....2285.7mW Junction-to-Ambient Thermal Resistance (BJA) (Note 1) 28-Pin TQFN.................................................................35NC/W Junction-to-Ambient Thermal Resistance (BJC) (Note 1) 28-Pin TQFN...................................................................3NC/W Operating Temperature Range .......................... -40NC to +85NC Storage Temperature Range............................ -65NC to +150NC Junction Temperature ................................................... +150NC Lead Temperature (soldering, 10s) ................................+300NC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to http://www.maxim-ic.com/thermaltutorial.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +4.5V to +5.5V, VL = +2.2V to VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Supply Voltage Logic Supply Voltage VCC Supply Current VL Supply Current ANALOG SWITCHES On-Resistance (R_, G_, B_) On-Resistance Match (R_, G_, B_) On-Resistance Flatness (R_, G_, B_) Off Leakage Current (R_, G_, B_) On-Resistance (SDA_, SCL_) Off-Leakage Current (SDA_, SCL_) R-HF-ON DRON VIN = +0.7V, IIN = Q10mA 0 P VIN P +0.7V, IIN = -10mA 0.5 -1 15 -1 +1 5 8 1 1 +1 I I I FA I FA SYMBOL VCC VL ICC IL VL P VCC VCC = +5.5V, VL = +3.6V, SEL_ = H1 = H2 = V1 = V2 = GND VCC = +5.5V, VL = +3.6V, SEL_ = H1 = H2 = V1 = V2 = GND CONDITIONS MIN +4.5 +2.2 2 TYP MAX +5.5 VCC 5 1 UNITS V V FA FA
RFLAT(ON) 0 P VIN P +0.7V, IIN = -10mA IOFF R-DDCON IOFF VR_, VG_, VB_ = 0V or VCC VIN = +0.7V, IIN = Q10mA VSDA_, VSCL_ = 0V or VL, VCC = VL = +5V
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High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +4.5V to +5.5V, VL = +2.2V to VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25NC.) PARAMETER Input Threshold Low Input Threshold High Input Hysteresis Input Leakage Current SEL_ Enable/Disable Time DIGITAL OUTPUTS (H0, V0) Output-Voltage Low Output-Voltage High Rise/Fall Time RGB AC PERFORMANCE Bandwidth On-Loss Crosstalk R_, G_, B_ Off-Capacitance On-Capacitance ESD PROTECTION R0, G0, B0, SDA0, SCL0, H0, V0 R0, G0, B0, SDA0, SCL0, H0, V0 All Other Terminals VESD VESD VESD HBM (Notes 2, 3) IEC 61000-4-2 Contact (Notes 2, 3) HBM (Note 2) Q15 Q8 Q2 kV kV kV fMAX ILOSS VCT COFF CON RS = RL = 50I f = 10MHz, RS = RL = 50I, 0 P V P +0.7V, Figure 3 f = 50MHz, RS = RL = 50I, Figure 3 f = 1MHz, R0 to R1/R2, G0 to G1/G2, B0 to B1/B2 (Note 2) f = 1MHz, R0 to R1/R2, G0 to G1/G2, B0 to B1/B2 (Note 2) 900 0.4 -40 2.5 5.5 8 MHz dB dB pF pF VOL VOH tR, tF IOUT = 8mA, VCC = +4.5V IOUT = -8mA, VCC = +4.5V RL= 2.2kI, CL = 10pF, Figure 2 2.4 8 0.8 V V ns SYMBOL VIL VIH VHYST IL tON, tOFF RL= 2.2kI, CL = 10pF, Figure 1 -1 300 100 +1 CONDITIONS MIN 0.25 x VL 0.55 x VL TYP MAX UNITS V V mV FA ns DIGITAL INPUTS (SEL_, H1, H2, V1, V2)
MAX4885AE
Note 2: Guaranteed by design. Not production tested. Note 3: Tested terminal to GND, 1F bypass capacitors on VCC and VL.
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High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection MAX4885AE
Typical Operating Characteristics
(VCC = +5.0V, VL = +3.3V, TA = 25C, unless otherwise noted.)
RON vs. VRO* (RGB SWITCHES)
MAX4885AE toc01
RON vs. VSDA0* (DDC SWITCHES)
*SDA0, SCL0 ARE INTERCHANGEABLE
MAX4885AE toc02
HV BUFFER OUTPUT-VOLTAGE HIGH vs. TEMPERATURE
IOUT = 8mA
MAX4885AE toc03
10 9 8 7 RON () 6 5 4 3 2 1 0 0
*R0, G0, B0 ARE INTERCHANGEABLE TA = +85C TA = +25C
50 40 30 20 10 0
5.2 5.0 OUTPUT-VOLTAGE HIGH (V) 4.8 4.6 4.4 4.2
VL = +3.3V TA = +85C TA = +25C TA = -40C
VL = +5V TA = +85C TA = +25C
TA = -40C
RON ()
TA = -40C
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VSDA0 (V)
4.0 -40 -15 10 35 60 85 TEMPERATURE (C)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VRO (V)
HV BUFFER OUTPUT-VOLTAGE LOW vs. TEMPERATURE
MAX4885AE toc04
SUPPLY CURRENT vs. TEMPERATURE
MAX4885AE toc05
ON-RESPONSE vs. FREQUENCY
-1 -2 ON-RESPONSE (dB) -3 -4 -5 -6 -7 -8 -9 -10 1 10 100 1000 FREQUENCY (MHz)
MAX4885AE toc06
1.0 0.8 0.6 0.4 0.2 0
IOUT = 8mA
5 4 SUPPLY CURRENT (A) 3 2 1 0
0
OUTPUT-VOLTAGE LOW (V)
ICC
IL
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
CROSSTALK vs. FREQUENCY
-10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100 1 10 100 1000 FREQUENCY (MHz)
MAX4885AE toc07
0
4
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection
Test Circuits/Timing Diagrams
VL 50% 0V VCC SEL1, SEL2 tOFF tON H0, V0 20% 20% tR tR 50% RL = 2.2k CL = 10pF VCC RL = 2.2k CL = 10pF
MAX4885AE
80%
80%
50% 0V H0, V0
50%
0V
Figure 1. Enable/Disable Time
Figure 2. Rise/Fall Time
+3.3V 1F
+5V 1F NETWORK ANALYZER VIN 50 50 INSERTION-LOSS = 20log CROSSTALK = 20log VOUT MEAS 50 REF 50
VL GND OR VL SEL1, SEL2
VCC R0, G0, B0
MAX4885AE R1, G1, B1 50 R2, G2, B2 GND
() ()
VOUT VIN VOUT VIN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. INSERTION LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 3. Insertion Loss and Crosstalk
5
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection MAX4885AE
Pin Configuration
TOP VIEW
I.C. H1 H2 16 B1 V1 V2 21 G1 22 R1 23 SCL1 24 SDA1 25 GND 26 VCC 27 SEL1 28 1 R0 2 G0 3 B0 4 H0 5 V0 6 SDA0 7 SCL0 20 19 18 17 B2 15 14 13 12 G2 R2 SCL2 SDA2 VCC VL SEL2 11 10 9 8
MAX4885AE
+
*EP
TQFN (4mm x 4mm)
*EXPOSED PAD. CONNECT TO GROUND OR LEAVE UNCONNECTED.
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 6 NAME R0 G0 B0 H0 V0 SDA0 SCL0 SEL2 VL VCC SDA2 SCL2 R2 G2 B2 H2 V2 I.C. V1 H1 B1 RGB Red Output (Note 4) RGB Green Output (Note 4) RGB Blue Output (Note 4) Horizontal Sync Output (Note 4) Vertical Sync Output (Note 4) I2C Data Output (Note 4) I2C Clock Output (Note 4) Select Input 2. Switches SDA_ and SCL_ signals. Supply Voltage. +2.2V P VL P VCC. Bypass VL to GND with a 1FF or larger ceramic capacitor. Supply Voltage. VCC = +5.0V Q10%. Bypass VCC to GND with a 1FF or larger ceramic capacitor. I2C Input Data 2 (Note 5) I2C Input Clock 2 (Note 5) RGB Red Input 2 (Note 6) RGB Green Input 2 (Note 6) RGB-Blue Input 2 (Note 6) Horizontal Sync Input 2 (Note 7) Vertical Sync Input 2 (Note 7) Internal Connection. Connect to ground or leave unconnected. Vertical Sync Input 1 (Note 7) Horizontal Sync Input 1 (Note 7) RGB Blue Input 1 (Note 6) FUNCTION
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection
Pin Description (continued)
PIN 22 23 24 25 26 27 28 -- Note Note Note Note 4: 5: 6: 7: NAME G1 R1 SCL1 SDA1 GND VCC SEL1 EP FUNCTION RGB Green Input 1 (Note 6) RGB Red Input 1 (Note 6) I2C Clock Input 1 (Note 5) I2C Data Input 1 (Note 5) Ground +5V Supply Pin Select Input 1. Switches R_, G_, B_, H_, and V_ signals. Exposed Pad. Connect exposed pad to ground or leave unconnected.
MAX4885AE
Terminal with Q15kV HBM protection. SCL1, SCL2, SDA1, and SDA2 are identical and can be used interchangeably. R1, R2, G1, G2, B1, and B2 are identical and can be used interchangeably. H1, H2, V1, and V2 are identical and can be used interchangeably.
Typical Applications Circuit
+3.3V +5.0V
0.1F 3.3k SCL SDA H MXM V GRAPHICS R G B +3.3V 3.3k 24 25 20 19 23 22 21 9
0.1F
10, 27
7 6 4 5
SCL SDA H V R G B
VGA COMMON OUTPUT
MAX4885AE
3.3k SCL SDA H INTERNAL V GRAPHICS R G B
3.3k 12 11 16 17 13 14 15
1 2 3
26, EP
28 SEL1
8 SEL2
NOTE: TWO VIDEO INPUT SOURCES BEING SWITCHED INTO ONE OUTPUT/SINK USING MAX4885AE.
7
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection MAX4885AE
Functional Diagram
R1 R2 G1 G2 B1 B2
R0
G0
B0
SCL1
SCL0
VL SCL2
VL SDA1 SDA0
VL SDA2
VL
MAX4885AE
H1 H0 H2
V1 V0 V2
SEL1 SEL2
CONTROL
8
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection
Detailed Description
The MAX4885AE integrates high-bandwidth analog switches and level-translating buffers to implement a complete 2:1 multiplexer for VGA signals. The device provides switching for RGB, HSYNC, VSYNC, SDA, and SCL signals. These signals are required in notebook VGA switching applications. The HSYNC and VSYNC inputs feature level-shifting buffers to support 5V-TTL output logic levels from lowvoltage graphics controllers. These buffered switches can be driven from +2.0V up to +5.5V. RGB signals are routed with high-performance analog switches. SDA_ and SCL_ are I2C signals with pullups to their respective voltages. The MAX4885AE protects the low-voltage side while effectively translating up to the high-voltage level. Two select inputs are provided to individually select groups of switches. RGB, HSYNC, and VSYNC signals are controlled by SEL1; and both SDA_ and SCL_ signals are controlled by SEL2. The MAX4885AE provides three SPDT high-bandwidth switches to route standard VGA R_, G_, and B_ signals (see Table 1). The R_, G_, and B_ analog switches are identical and any of the three switches can be used to route red, green, or blue video signals. The R0, G0, and B0 outputs are ESD protected to Q15kV (HBM). H1, H2, V1, and V2 inputs are buffered to provide levelshifting and drive capability for horizontal/vertical sync signals that meet the VESA specification. The H_ and V_ level-shifters are identical, and each level-shifter can be used for either horizontal or vertical signals. The SDA0 and SCL0 outputs are ESD protected to Q15kV (HBM). The MAX4885AE provides two logic-level translating switches to route DDC signals (see Table 2). VL is normally set to +3.3V to provide logic-shifting for VESA I2C-compatible signals. The MAX4885AE protects the low-voltage graphics controller from +5V that could be present in VESA-compatible monitors. In some applications, such as KVM, where logic-level shifting is not required, then VL can be connected to VCC. The SDA_ and SCL_ switches are identical, and each switch can be used to route either SDA_ or SCL_ signals. The SDA0 and SCL0 outputs are ESD protected to Q15kV (HBM). As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additionally, the R0, G0, B0, H0, V0, SDA0, and SCL0 terminals of the MAX4885AE are designed for protection to the following limit: 15kV using the HBM. For optimum ESD performance, bypass VCC and VL pins to ground with 1FF or larger ceramic capacitors as close as possible to these supply pins.
RGB Switches
MAX4885AE
Horizontal/Vertical Sync Level Shifter
Display-Data Channel Multiplexer
Table 1. RGB/HV Truth Table
SEL1 0 R1 to R0 G1 to G0 B1 to B0 R2 to R0 G2 to G0 B2 to B0 FUNCTION H1 to H0 V1 to V0 H2 to H0 V2 to V0
ESD Protection
1
Table 2. DDC Truth Table
SEL2 0 1 SDA1 to SDA0 SCL1 to SCL0 SDA2 to SDA0 SCL2 to SCL0 FUNCTION
9
High-Bandwidth, VGA 2:1 Switch with 15kV ESD Protection MAX4885AE
RC 1M CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1.5k DISCHARGE RESISTANCE DEVICE UNDER TEST IP 100% 90% AMPERES 36.8% 10% 0 Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
CS 100pF
STORAGE CAPACITOR
0
tRL
TIME tDL CURRENT WAVEFORM
Figure 4. Human Body ESD Test Model
Figure 5. Human Body Model Current Waveform
Figure 4 shows the HBM, and Figure 5 shows the current waveform it generates when discharged into a lowimpedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kI resistor.
Human Body Model
Bypass each VCC pin and VL pin to ground with a 1FF or larger ceramic capacitor as close as possible to the device.
Power-Supply Decoupling
ESD performance depends on a variety of conditions. Contact Maxim for a reliability report, test setup, methodology, and results.
ESD Test Conditions
High-speed switches such as the MAX4885AE requires proper PCB layout for optimum performance. Ensure that impedance-controlled PCB traces for high-speed signals are matched in length and as short as possible. Connect the exposed pad to ground or leave unconnected.
PCB Layout
Applications Information
The MAX4885AE provides the switching and levelshifting necessary to drive a standard VGA port from either an internal graphics controller or an add-in module (MXM or GPU--see Typical Applications Circuit). The R_, G_, and B_ signals are switched through the three low-capacitance SPDT switches. Internal buffers drive the HSYNC and VSYNC signals to VGA standard 5V-TTL levels. The DDC multiplexer provides level-shifting. Connect VL to +3.3V for normal operation, or to VCC to disable level-shifting for DDC signals as for KVM application. PROCESS: BiCMOS
Chip Information Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE 28 TQFN-EP PACKAGE CODE T2844+1 DOCUMENT NO. 21-0139
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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(c)
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